The reproducibility of delay interrupts is the deviation in time of the call of the first statement of the Alarm OB from the programmed interrupt time.
The reproducibility of cyclic interrupts is the range of fluctuation of the difference in time between two consecutive calls measured between the first statement of each Alarm OB.
The CPU31x manual, section 5.5.2 "Reproducibility of delay interrupts and process alarms" provides information on the times that are valid for the S7-300 CPUs with regard to reproducibility.
- Delay interrupt: +/-200µs
- Cyclic interrupt: +/-200µs
These times also apply for the following interface modules of ET 200S and ET 200pro:
- IM151-8 PN/DP CPU
- IM151-8 F CPU
- IM154-8 PN/DP CPU
These times are only valid if the interrupt can be executed at that time and is not delayed by higher-priority interrupts or equal-priority interrupts that have not yet been executed.
The CPU31x manual is available for downloading in Entry ID: 12996906.