This error message might be caused by an illegal interconnection of an input channel to a driver block.
In your project you are using a CH_DI block that has been imported into the project via the IEA (Import/Export Assistant) and the "Include signal in the symbol table" option was selected.
If after import into the symbol table an input word is mistakenly assigned to the symbol instead of an input bit, then the input parameter VALUE of the CH_DI block is interconnected to input word. This leads to the above-mentioned error message when the module driver structure is generated.
Correct the symbolic interconnection of the input driver (CH_DI block) in the CFC.
A plausibility check is made in both the IEA and the CFC.
Module Driver generator, Symbolic interconnection